What exactly is the difference between those two? They use the same CS8900a chip and as I understand it, the only difference is the register locations..?

Yep.

Thanks. I got the details now. To bone it out a little:

The only difference between TFE/64Net and RR-net AFAIK is the fact that the upper/lower half of the registers are swapped on RR-net because of the RR registers at $de00/01. Hence, it's only a matter of changing a few bytes to make your programs work. Note how TFE/64Net has the "correct" register mapping according to the CS8900A specs, while RR-net's registers are swapped:


In other words the difference for RR-net registers low byte could be expressed as something like rr-net_reg = (original_reg+8) AND 15. I'm sure it's possible to figure out some fast and clever code to write a "combined" driver by using indirect instructions and pointers. But essentially, all you need is the above register definitions to be able to compile your programs for RR-net or TFE/64Net.

Also, care has to be taken to the fact that since TFE/64Net registers begin at $de00 where RR registers are located, all RR related code should be omitted when running/compiling under TFE/64Net.

I've been in contact with the developers of the (E)TFE (through a translator though, as the developers only speak Hungarian ) They plan to include a jumper to make the ETFE V2 RR-Net compatible.

That's nice. But ETFE is also a daughter board design, right? AFAIK from the pictures on the homepage

It's a pretty slick approach, actually, though the mechanical design is a bit clunky.

Basically, there's the ETFE board, and three optional adaptors that go between that board and either 1) The IDE64 Shortbus, 2) A clock port, or 3) Directly to the C64 cartridge port (or an expander slot).

So it covers all the possible situations, I think.

Sounds nice (although it looks a bit ugly but we Retrohackers aren't exactly spoiled with good looking design, so who cares )

Are the ETFE and adaptors available already, and is there anyone who understands english?

Here, let me quote the emails I received, rather than repeat them. Kajtar is aka Soci of the IDE64 project.

True, but I like my setup to look nice. A case would also help to protect the board.

I have no electronics skill whatsoever...but...all you would need to do this in hardware would be an inverter on A3, right?

I don't have any electronics skills either, but it sounds right to me.

That's pretty interesting. Has anyone tested this?

The inverter on A3 will correctly map the register locations. The only issue I see is the propagation delay of the inverter possibly causing erroneous data on A3. However, with the 74139 ICs in place controlling I/O timing, as long as the inverter is the same speed or faster, it should be OK.

I think it would be a nice feature offering TFE compatibility but I don't want to pay many cents for it

That's a good idea. I'll see if I can do it cheaply. Off the top of my head, I'm thinking that if a single 7404 inverter is all that's needed to remap the register locations, then it's absolutely the easiest thing in the world. A DPDT switch coupled with the inverter should do the trick.

ill get one as long as its TFE/64Net or RR-net compatible...

it would be nice to fit it in a cart..


paypal would be nice

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